Hardware

sparrow-board

Sparrow revision 1.4

Sparrow enclosure front-view

Sparrow enclosure (rear-view)

Sparrow

The Sparrow platform was designed by one-time University of Cambridge Astronomy Department colleagues Nima Razavi Ghods and Jack Hickish, as a means to cost-effectively digitize signals from large, distributed, low-frequency radio telescopes.

Sparrow is intended to ingest a pair of analogue signals (typically from a dual-polarization antenna), digitize them, and output them as a stream of UDP/IP packets using 10 Gbit/s Ethernet. Sparrow has the ability to lock its digitizer sampling clock to a reference provided by a White Rabbit timing network.

Top-level Specifications

  • Zynq xc7z030-2ffg676 FPGA (also compatible with xc7z035/45 chips)

  • Dual-channel, 12-bit, 500 Msps Texas Instruments ADS5407 ADC (also compatible with 800 and 900 Msps parts)

  • Timing reference from on-board oscillator, external RF reference (via MMCX connector) or White Rabbit timing network (via SFP)

  • Quad SFP+ connectors, configurable as either 1 x 40Gb Ethernet, 4 x 10Gb Ethernet, or 3 x 10Gb Ethernet + 1Gb White Rabbit

  • Dual RF input via SMA connectors

  • Zynq 1 Gb Ethernet (RJ45)

  • Linux OS (Ubuntu 20.04 SD card image supported)

Resources

Current Status

August 2023: We have 5 prototype Sparrow boards in enclosures, and are working with colleagues to get these out in the field. We will have boards to play with at the CASPER 2023 workshop

Interested in Sparrow?

If you have an interest in the Sparrow project please do get in touch.